1. Technical Field
The inventive concept relates to a phase change memory device and a method of manufacturing the same and, more particularly, to a phase change memory device being capable of improving current driving capacity and a method of manufacturing the same.
2. Related Art
Demand for low power consumption in next-generation memory devices have been under development. A phase change memory device which is one of the next-generation memory devices stores binary information by reversibly switching a phase change material, such as a germanium (Ge)-antimony (Sb)-tellurium (Te)-based material, between a crystalline solid state phase and an amorphous solid state phase driven by different amounts of heat which is locally generated by electrical pulses.
That is, the phase change memory device can be driven to reversibly change phases between the amorphous and crystalline states by applying an electrical current (i.e., Joule's heat) across the phase change material. At this time, the phase change material exhibits a low resistance in the crystalline state and a high resistance in the amorphous state. The crystalline state can be arbitrarily defined as a SET state corresponding to a logic level “0” and the amorphous state can be defined as a RESET state corresponding to logic level “1”. According to this scheme, phase change memory devices can be used to store and read digital data corresponding to binary on-off states by using this resistive difference corresponding to each particular solid state phase of the phase change material.
Herein, the reversible solid state phase changes in the phase change material can be driven by an applied current therethrough and this applied current can be generated by an electric field formed between a word line and a bit line. For example, the word line may be comprised of a junction region contacts to a switching device of the phase change memory device and the bit line may be comprised of a metal wiring which contacts with an upper electrode of the phase change memory device.
The phase change memory device may also be divided into a cell area where memory cell arrays are arranged therein and a core/peripheral area where memory cell driving devices are arranged therein.
Presently, the memory cell arrays and the driving transistors of the phase change memory device are formed on conventional silicon substrates and have driving transistors are formed in the core/peri area that use a polysilicon layer or a polycide layer as a gate. Due to an improvement in an integration and performance, there is a demand for even higher current driving capacities in the phase change memory device.
However, there is a physical limit to which to improve the current driving capacity of a switching device comprising a memory cell array and the driving transistors which affects the current characteristics.